1) pipeline technology
流水线技术
1.
Research on Application of Pipeline Technology Based on FPGA in DSP Operation
流水线技术在基于FPGA的DSP运算中的应用研究
2.
This Paper aims at studying the realization of high resolution SAR simulator based on Field Programmable Gate Array(FPGA),it makes use of the pipeline technology,parallel array technology in modern VLSI design and takes advantage of the excellent performance,abundant resources of VLSI.
本文着眼于高分辨率SAR模拟器的FPGA实现的算法研究,充分利用现代VLSI设计中的流水线技术与并行阵列技术以及超大规模集成电路FPGA的优良性能和丰富资源,在时间上采用同步流水结构、空间上采用并行阵列形式,将速度和容量问题统一为数据的高速生成问题,给出了SAR回波数学模型和硬件实现框图。
3.
The optimization designs of FIR filter implemented on FPGA with pipeline technology and distributed arithmetic are presented in the first.
介绍了应用流水线技术、分布式算法对FIR滤波器在FPGA硬件实现上的优化设计,并以Altera公司的DSPBuilder为例,详述了采用新一代DSP辅助设计工具,将MATLAB的Simulink环境和FPGA开发工具组合在一起,进行DSP设计的通用流程。
2) pipelining
[英][,paip'lainiŋ] [美][,paɪp'laɪnɪŋ]
流水线技术
1.
the project of the control unit and saving unit is put forward, and the paper gives explanations of the key technique like pipelining etc.
首先介绍了系统的组成和总体设计,然后在此基础上详细提出了控制单元模块和存储单元模块的设计方案,并对其中的关键技术如流水线技术加以具体说明,最后在现场可编程门阵列 FPGA 中用 VerilogHDL 硬件描述语言实现了控制逻辑,很好的完成了空载固态记录器中控制模块的设计。
2.
Some special approaches, such as pipelining, reconstructing variable length code tables and partitioning a long look-up table into several shorter ones, which facilitates parallelity, are introduced.
通过将码表改造、分割长码表为几个短码表并行查表、使用流水线技术等措施减少关键路径的延时以提高工作频率,保证了MPEG 4ASP@L5格式码流的实时解码。
3.
A method based on assembly language optimizing source code of TMS320C6000 through software pipelining is presented.
介绍了一种利用汇编语言 ,借助流水线技术优化 TMS3 2 0 C60 0 0源代码的方法。
3) pipeline
[英]['paɪplaɪn] [美]['paɪp'laɪn]
流水线技术
1.
After multirate signal processing,distributed arithmetic and pipeline technologies are applied in multirate DA FIR,the quantity of computing is decreased heavily,and the speed of processing is increased.
该方法采用了多速率信号处理技术、分布式算法和流水线技术,使多速率DAFIR滤波器计算量大大减少,处理速度得到极大提高。
2.
Through a comparison and analysis of the classic design method of phase accumulater of DDS based on Verilog HDL ,a design method of pipeline and blending adder with register is presented in the paper.
通过对基于VerilogHDL的DDS相位累加器的传统设计方法的对比分析,提出了应用流水线技术加法器与寄存器结合在一起进行相位累加器设计的方案,该方案既具有提高速度又具有节约资源的优点,并且以一个八位相位累加器为例,给出了实验仿真结果。
3.
For optimizing floating-point units,a design based on pipeline techniques is described in this paper.
运用流水线技术对单精度浮点乘法和加法运算单元进行了优化设计。
4) pipeline technique
流水线技术
1.
This paper discusses the application of pipeline technique which is used in very large scale integrated circuit such as FPGA and CPLD.
本文介绍流水线技术在超大规模集成电路 FPGA和 CPLD设计中的应用 ,文中对给出的例子进行了仿真 ,并给出了比较结果。
2.
Since the rapid development of semiconductor device technique, pipeline technique is used very widely in 32 bit microprocessor.
由于半导体器件技术的迅速发展，流水线技术在３２位微机中应用十分广泛。
5) pipelining technology
流水线技术
1.
Design and implementation of FIR filter based on pipelining technology;
基于流水线技术的FIR滤波器的设计与实现
6) Assembly Line Technology
装配流水线技术
补充资料：SNYG型灌装机流水线
在SNYG灌装机的基础上，可以配置不干胶贴标机(单面贴、双面贴两种)旋压盖机(或自动理盖机，自动加盖机和自动旋盖机)在桶口使用铝箔可以起到保质和防伪的效果，配置FL系列铝箔感应封口机，进行生产日期的喷码(进口代理喷码设备)，最后装箱使用装箱机和包装带捆扎机，然后在纸箱上进行纸箱日期喷码。  |
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条