1) two-phase non-overlapp-ing clock
两相非重叠时钟
2) two-phase non-overlapping clock
两相非交叠时钟
3) non-overlapping clock circuit
非重叠时钟电路
4) clock overlap
时钟重叠
1.
The Tri-State-TG,positive edge sensitive,master-slave,register,during the clock overlap period of single-clock system,will lead to sample in the non-clock positive edge and the data output will change in the negative edge.
三态传输门正边沿主从寄存器,在单时钟系统中时钟重叠期间,会导致在非时钟上升沿期间采样,以及输出在负边沿发生变化。
5) two-phase clocking
两相时钟
1.
Finally, how to use VERILOG HDL to describe two-phase clocking andsome caveat combined with example are introduced.
本文阐述了两相时钟方案的规则,通过比较一相时钟与两相时钟方案,给出了两相时钟方案用于同步时序电路设计的优点。
6) two-phase non-overlap power-clocks
二相无交叠功率时钟
补充资料：非想非非想处天
1.佛教语。即三界中无色界第四天。此天没有欲望与物质﹐仅有微妙的思想。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条