1) RGC
可调节共源共栅
1.
The transimpedance amplifier(TIA)takes a fully differential configuration,feedback oscillation technique,and regulated cascode(RGC)input stage for bandwidth enhancement.
跨阻放大器(TIA)采用全差分结构,利用震荡反馈技术和可调节共源共栅(RGC)结构来增加其带宽。
2.
A fully differential CMOS limiting amplifiers with low voltage drop active inductors and RGC for bandwidth and gain enhancement is presented in this paper.
限幅放大器采用全差分结构,利用有源电感技术和可调节共源共栅结构在1。
2) RGC
调整型共源共栅
3) Cascode
['kæskəud]
共源共栅
1.
This paper analyzed the fault of the cascode topology with the source degeneration inductance for CMOS low frequency and low power LNA design optimization techniques.
分析了具有源级退化电感的CMOS共源共栅结构电路在低频、低功耗LNA设计中存在的缺陷,为满足低频、低功耗设计的要求,现广泛采用在该电路结构基础上再并联栅极电容的结构。
2.
This paper proposes a bias circuit for cascode current mirror in band-gap voltage reference to realize low supply voltage.
通过设计带隙基准电压源中共源共栅电流镜的偏置电路以实现低电源电压工作。
3.
A design optimization of CMOS cascode LNA is presented by Smith chart though the parameter sweep of the width of common source stage,source inductor and gate inductor in ADS.
运用仿真工具ADS,通过对CMOS共源共栅低噪声放大器的共源级栅宽,源级电感以及栅极电感值的扫描仿真,以Smith阻抗圆图的形式给出了一个直观的LNA设计优化流程,近似实现了最佳噪声源阻抗和输入阻抗的同时匹配。
5) regulated-cascoded
调整型共源共栅结构
1.
a regulated-cascoded S~2I memory cell is proposed and simulated by HSpice.
针对开关电流电路中的时钟馈通误差与传输误差进行详细分析,构造出一种调整型共源共栅结构的S2I开关电流存储单元,并用HSpice进行仿真,与基本的开关电流存储单元的性能和Matlab中的理想波形进行对比。
6) folded-cascode
折叠共源共栅
1.
Design of folded-cascode operational amplifier with 0.6μm CMOS process;
0.6μm CMOS工艺折叠共源共栅运算放大器设计
2.
Design of low voltage CMOS folded-cascode mixer;
低压CMOS折叠共源共栅混频器的设计
3.
The integrator uses a fully differential topology combined with fully differential folded-cascode amplifier and improved switch.
介绍了一种用于DRSSADC(dual-ramp-single-slop analog to digital converter)电路的积分器设计,该积分器电路采用全差分结构,主要包含了折叠共源共栅运算放大器和改进型开关电路。
补充资料：执共
1.保持恭敬。共，通"恭"。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条