In order to minish the power consumption and the area of A/D converter,the structure of digital decimation filter in Δ-ΣA/D converters is designed by analyzing its principle.

An approach for designing digital-intermediate frequency(IF) receiver is introduced,the principle analysis and deduction of all parts of the receiver are performed including design of available-band filter,Analog-to-Digital Converter(ADC),digital orthogonal transforms based on digital polyphase filter,decimation filter,baseband signal processing unit.

This paper introduces the principle and structure of decimation filter in software radio, analyzes and compares the performances of various decimation filters, and finally, discusses the optimal realization in FPGA.

Design for the Decimator of Second Order Sigma-delta ADC;

Design of a digital decimator of sigma-delta ADC is discussed.

Implement of 2N digital interpolation by TMS320C5402 based on half-band filter;

Moreover,corresponding to different filter length N and frequency vector setting modes(traditional symmetry or even symmetry),4 types of all-phase half-band filters were designed.

If a half-band filter is used as a prototype filter in the proposed method,even more multipliers can be .

The last 4 times decimation was achieved by two half band filters and a droop FIR.

A digital class-D audio amplifier,PWM modulating chip,based on half band filters is designed.

Then,a simple and efficient design method of interpolation and decimation filters based on a halfband filter is presented,and more efficient algorithms on both filters than current algorithms are described.

The way to design CIC filter and halfband filter is introduced in details as well as their structures,with FDATool in Simulink,on the platform of Matlab.