1) edge J-K flip-flop
边沿式J-K触发器
1.
This paper introduces the main differences between the master-slaver mode J-K flip-flop and the edge J-K flip-flop from aspects of the concept,and sequence diagrams,etc.
从概念到时序图等几个方面介绍了主从式J-K触发器与边沿式J-K触发器的主要区别,并分析了两者在何种特定的工作条件下,功能才会相同。
2) J-K flip-flop
J-K触发器
3) master-slaver mode J-K flip-flop
主从式J-K触发器
1.
This paper introduces the main differences between the master-slaver mode J-K flip-flop and the edge J-K flip-flop from aspects of the concept,and sequence diagrams,etc.
从概念到时序图等几个方面介绍了主从式J-K触发器与边沿式J-K触发器的主要区别,并分析了两者在何种特定的工作条件下,功能才会相同。
4) double-edge-triggered flip-flop
双边沿触发器
1.
Design of low power multivalued double-edge-triggered flip-flop;
多值低功耗双边沿触发器设计
2.
The application of this type of double-edge-triggered flip-flop in seq.
从双边沿触发器的特点出发,提出了一种双边沿动态触发器的设计方案,该触发器结构较其他几种设计方案简单。
5) Single-edge-triggered Flip-flop
单边沿触发器
1.
Design of Double-edge-triggered Time Sequence Circuit Based on Single-edge-triggered Flip-flop;
基于单边沿触发器的双边沿时序电路设计
6) TTL JK edge-triggered flip-flop
JK边沿触发器
1.
In this paper ,the unusual phenomena of TTL JK edge-triggered flip-flops are brought forth by experiment when the Cp edge s time is excessive long , and the cause of it is proved up , the formulae for the maxima of CP edge s time are set up as well , which is consistent with the practical measurement.
用实验展现了CP边沿时间过长时集成TTLJK边沿触发器出现的异变现象,探明了产生异变现象的原因,推导了CP边沿时间最大值的计算公式,与实际测量取得了一致的结果。
补充资料：变换器式频率表(见交换器式电表)
变换器式频率表(见交换器式电表)
transducer type frequency meter
曰‘口，”IuullqISn}P旧iUbloo变换器式颇率表meter)(transdueer tyPe见变换器式电表。frequeney
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条