1) Verilog HDL
Verilog DHL语言
2) Verilog
Verilog
1.
Interface Design Based on Verilog Language in SoC Hardware Interface Synthesis;
SoC硬件综合设计中基于Verilog语言的接口程序设计
2.
Implementation of A Verilog-VHDL Translator;
Verilog-VHDL翻译器设计与实现
3.
The Basis of Chip Design Methodology ──Verilog Hardware Description Language──National Standard GB/T 18349-2001"Integrated Circuit/ Computer Hardware Description Language Verilog;
芯片设计方法学的基础——硬件描述语言Verilog——国家标准GB/T18349-2001《集成电路/计算机硬件描述语言Verilog》介绍
3) Verilog-a
Verilog-a
1.
Modeling and Simulation of Capacitive Gate transducer Using Verilog-A;
基于Verilog-A的容栅传感器建模与仿真
2.
Design of VCO based behavioral model using Verilog-A;
基于Verilog-A行为描述模型的VCO设计
3.
System Design of PLL Based on Behavioral Model Using Verilog-A;
基于Verilog-A行为描述模型的PLL系统设计
4) Verilog-HDL
Verilog-HDL
1.
Design of Bidirectional Port Based on Verilog-HDL in Logic Analysis Card;
基于Verilog-HDL的逻辑分析卡中双向端口的设计
2.
Design and Simulation of UART Serial Communication Module Based on Verilog-HDL;
基于Verilog-HDL的UART串行通讯模块设计及仿真
3.
Design a Sequence-inspected Equipment in Verilog-HDL;
用Verilog-HDL设计序列检测器
5) VHDL/Verilog
VHDL/Verilog
6) verilog-XL
Verilog-XL
参考词条
System Verilog
Verilog-AHDL
Verilog_xl
Verilog PLI
Verilog-A HDL
RTL Verilog
Verilog_HDL
Verilog-A模型
Verilog HDL描述
Verilog HDL语言
Verilog语言
Verilog语义
VERILOG仿真
Verilog HDL inout
Verilog编译
旋转机械手
超超临界火电机组
补充资料：BASIC语言(见程序设计语言)
BASIC语言(见程序设计语言)
BASIC
吕AS{CBASICyLJy〔1下〕语言(BASIC)见程序设计语言。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。