2) DRAM
动态存储器
1.
In this paper, the first-in-first-out(FIFO) circuit design for the PCI-Express interface is proposed,which is based on the dynamic access memory (DRAM) core with the 0.
18μm标准CMOS工艺实现的基于动态存储器(DRAM)内核的高速大容量先入先出存储器(FIFO)电路及其版图设计。
2.
DRAM is an important memory device,the application of FPGA is quite extensive in the area of hardware design.
动态存储器(DRAM)是重要的存储器件,现场可编程门阵列(FPGA)在计算机硬件设计领域的应用也十分广泛。
3) dynamic memory
动态存储器
1.
Design of dynamic memory in data acquisition of nuclear medicine;
核医学数据获取动态存储器的设计
4) SDRAM
动态存储器
1.
Based on 60MHz intermediate - frequency signal of weather radar , by using the technology of A/D undersampling , digital- direct synthesizing sampling clock, putting SDRAM as large- scale buffer and 64 bits PCI bus as high- speed transfer ,the paper has r.
本文针对天气雷达60MHz中频信号,通过应用A/D欠采样技术、数字直接合成采样时钟、以动态存储器(SDRAM)为大容量缓存、64位PCI总线为高速传输,实现了中频数据采集和传输;文中详细介绍了这些关键技术的设计。
5) storage,dynamic
动态储存器
6) status memory and real-time system
状态存储器及实时系统
补充资料：随机存取存储器(见半导体存储器)
随机存取存储器(见半导体存储器)
random access memory,RAM
s日1}}Cunq日Ct旧choql随机存取存储器random aeeess memoryRAM)见半导体存储器。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条