Tasks scheduling algorithm for parallel system with multi-core processor;

Research and Implementation of a Verification Platform for Multi-core Processor Prototype;

Research on Linux network packet buffer recycling toward multi-core processor

This paper focuses on a chip multi-processor,using transient fault injection,to obtain its vulnerability characteristic of transient faults,Experimental results demonstrated that the register file,the instruction queue and the register upda.

This paper expounds the principle and the application of multiprocessors parallel processing, hyper-threading technology and multi-core processors by narrating various methods that enhance the computer performance as a beginning.

Kind of design of UTM based on multi-core network processor;