1) gain-boosted folded-cascode OTA
增益增强折叠共源共栅跨导运放
2) folded cascode Op Amp
折叠式共源共栅运放
1.
A novel comparator with hysteresis for RS 485 communication is presented,based on folded cascode Op Amp with active current mirror,single-ended output,adding four NMOS at folded point to supply positive feedback.
比较电路采用带有源电流镜的折叠式共源共栅运放,单端输出,在折叠点处增加4个NMOS管为电路提供正反馈,并通过适当的调节其中2个的宽长比来改变迟滞电压的范围。
3) folded cascode amplifier
折叠式共源共栅放大器
1.
These two series PNP transistors reduce the effect of the voltage offset,a folded cascode amplifier increases the precision of the whole circuit,and a negative feedback structure improves the stability of VPTAT the circuit.
通过三极管串联来减小失调电压的影响,通过折叠式共源共栅放大器来提高电路精度,通过增加负反馈电路来提高电路的稳定性。
4) folded-cascode
折叠共源共栅
1.
Design of folded-cascode operational amplifier with 0.6μm CMOS process;
0.6μm CMOS工艺折叠共源共栅运算放大器设计
2.
Design of low voltage CMOS folded-cascode mixer;
低压CMOS折叠共源共栅混频器的设计
3.
The integrator uses a fully differential topology combined with fully differential folded-cascode amplifier and improved switch.
介绍了一种用于DRSSADC(dual-ramp-single-slop analog to digital converter)电路的积分器设计,该积分器电路采用全差分结构,主要包含了折叠共源共栅运算放大器和改进型开关电路。
5) folded cascode
折叠共源共栅
1.
This paper analyzes the drawback of traditional biased folded cascode operational amplifier and proposes a new biased folded cascode operational amplifier.
文章分析了基于传统偏置的折叠共源共栅运算放大器,提出了一种具有反馈偏置的折叠共源共栅运算放大器;在不降低运放其他性能指标的前提下,抑制了折叠共源共栅运放由于共模输入电平变化以及工艺失配而造成的尾电流源的电流变化,稳定了运放的直流工作点,提高了运放的共模抑制比。
2.
The operational amplifier uses the structure of folded cascodea,continuous time CMFB and unique bias circuit to reach high speed and high stability.
设计中采用了折叠共源共栅结构、连续时间共模反馈以及独特的偏置电路,以期达到高速及良好的稳定性。
3.
A low-voltage folded cascode low noise amplifier(LNA)available to bluetooth,based on 0.
18微米CMOS工艺,设计了一种应用于蓝牙的低电压折叠共源共栅低噪声放大器。
6) folded-cascode
折叠式共源共栅
1.
By using the structures such as current mirror,folded-cascode and so on,the function of comparison in peak-value-current-mode-control is realized.
电路设计采用电流镜、折叠式共源共栅等结构,实现了在峰值电流控制模式中的电流比较功能。
2.
By using the structures such as current mirror,folded-cascode and so on,The gain,PSRR and CMRR are improved remarkably;The logic circuit realizes clamp and operation-mode select of the chip.
误差放大器的核心部分采用电流镜、折叠式共源共栅等结构,显著提高了增益、电源抑制比和共模抑制比;逻辑控制部分实现了对芯片工作模式的选择控制,并具有钳位功能。
3.
In addition to gain-boosting technology,folded-cascode is utilized to make the charge and discharge current match.
8V CMOS工艺设计一种增益提高型电荷泵电路,利用增益提高技术和折叠式共源共栅电路实现充放电电流的匹配。
补充资料：增益
分子式：
CAS号：
性质：又称增益，输出变化量与输入变化量之比。其反映的是稳态特性，放大系数越大，输入变量对输出，变量的影响越大。
CAS号：
性质：又称增益，输出变化量与输入变化量之比。其反映的是稳态特性，放大系数越大，输入变量对输出，变量的影响越大。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条