1) competition and adventure
竞争-冒险
1.
The disturbance pulse caused by competition and adventure maybe emerged in the output terminal of assembled logic circuit when the statement of input signal changes.
在组合逻辑电路中,当输入信号改变状态时,输出端可能出现由于竞争-冒险而产生的干扰脉冲信号,如果负载是对干扰脉冲信号十分敏感的电路,有可能引起电路的误动作,因此应该采取措施消除竞争-冒险。
2) race and hazard
竞争冒险
1.
This article takes changeable Modulo-k Reversible Counter as an example,analyzes the reason of race and hazard occured in digital circuit design with VHDL language from many guises,such as the design of program,simulation wave and synthesis circuit,and gives the asynchronous sequential logic design method for clearance race and hazard.
竞争冒险作为数字电路设计中经常会遇到的现象,存在可能导致高速电路或毛刺敏感电路的逻辑错误。
2.
The article analyses the phenomenon of race and hazard in the asynchronous sequential logic circuit and synchronous sequential logic circuit, and it presents some methods about avoiding the race and hazard in the sequential logic circuit.
分析了异步时序逻辑电路和同步时序逻辑电路中的竞争冒险现象,给出了消除竞争冒险的方法和途径。
3.
The race and hazard in the sequential logic circuit is quite essential and must be considered when designing logic circuit.
时序逻辑电路中的竞争冒险是电路设计中必须考虑到的重要方面。
3) competition risk
竞争冒险
1.
This paper analyzes the reason for competition risk in PLD and many kinds of methods to avoid competition risk in digital system design are introduced.
本文分析了可编程逻辑器件出现竞争冒险的原因,介绍了在数字系统设计过程中常用的几种消除竞争冒险的措施。
2.
It is easy to cause competition risk phenomenon in FPGA because of its internal mechanism.
现场可编程门阵列(FPGA)由于其内部构成,容易引起竞争冒险现象,从而使电路工作的稳定性大受影响,电路也容易产生误动作,以致产生意想不到的后果。
3.
It is easy to cause competition risk problem in Field Program Gates Array (FPGA for short below) circuits design due to its internal mechanism.
以我们在实验教学中的应用与实践为主线,详细介绍了消除竞争冒险的各种方法。
4) competitive risk
竞争冒险
1.
This article introduces several ways how to eliminate the competitive risk of the logical electronic integrated circuit sets through elected pulse, increasing redundancy item and combing the output with capacitance.
本文介绍如何利用加选通脉冲、增加冗余项、输出端并联电容,从而消除组合逻辑电路中的竞争冒险的几种方法。
2.
The competitive risk of digital circuit is an element that should be considered when designing a digital system.
数字电路中的竞争冒险是数字系统设计时必须考虑的因素,在可编程逻辑器件中,这一问题变得更加重要。
5) competitive adventure
竞争冒险
1.
According to the theory of competitive adventure phenomenon in combinatorial logical circuit,the disposal of integrated gate circuit s extral input end in competitive adventure phenomenon is researched by experiments.
根据组合逻辑电路中竞争冒险现象的理论,用实验的方法,研究了竞争冒险现象中对集成门电路多余输入端的处理问题。
2.
Competitive adventure can be detected by a circuit’s logical function, listing the truth table of circuit in sequence and testing the circuit.
竞争冒险可影响电路功能甚至破坏整个电路正常运转。
6) race hazard
竞争冒险
1.
Complete algebraic analysis on detecting and eliminating race hazard;
关于检验与消除竞争冒险的完整代数分析
2.
The cause of formation of the race hazard at 10Hz to 1MHz was proposed, which is independent of the signal frequency.
在10Hz～1MHzTTL信号下,提出竞争冒险的产生与信号频率无关。
3.
The narrow pulse produced by the race hazard of clock is used to control the ternary latch,so as to meet the ‘non transparent’ demand.
本文利用时钟信号的竞争冒险现象 ,提出了CMOS时钟信号竞争型三值D型边沿触发器的逻辑设计 。
补充资料：冒险
冒险
adventure
冒险(a dventure)人为达到一定的目的，不顾安危、不怕风险的行为。它是创造性活动中的一种非智能因素。其表现为:敢想敢干，大胆、勇敢地进行各种创新的尝试，即使感受到畏J具和失望的体验也不退缩。 (张明撰租娴吴万森审)
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条