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1)  Substrate capacitive loss
衬底容性损耗
2)  substrate loss
衬底损耗
1.
Based on prior experiments, substrate losses and metal losses were minished to minimum, but the low Q problem still exists.
衬底损耗和金属损耗一直被认为是限制集成电感品质的主要因素。
2.
The paper initiates a method for improving capability of parallel connected spiral inductor based on substrate loss、metal loss and proximity effects.
该文从衬底损耗、金属损耗及邻近效应出发,首次提出了一种提高并联集成电感性能的方法。
3)  low-loss substrate
低损耗衬底
1.
OPS (oxidized porous silicon) and HR (high-resistivity) substrates are used as low-loss substrates for on-chip planar LPF (low pass filter) fabrication.
分析比较了不同种类衬底上无源器件(片上电感和电容)的损耗机理,在OPS(氧化多孔硅)和HR(高阻硅)低损耗衬底上分别实现了片上低通滤波器。
4)  silicon substrate loss
硅衬底损耗
5)  eddy current loss
衬底涡流损耗
1.
This model takes the following factors into account: the functions of skin effect,proximity effect,and eddy current losses in the substrate to frequency-dependent series parameters L_s and R_s in light of modified partial equivalent element circuit methodology and a full-coupled transformer loop.
该模型考虑了趋肤效应、邻近效应和衬底涡流损耗对螺旋电感中串联电感和串联电阻频率特性的制约,并通过2π等效电路结构计入了电感中寄生电容的分布特性。
6)  substrate leakage loss
衬底泄露损耗
补充资料:介质损耗角正切试验(见电容率与损耗因数试验)


介质损耗角正切试验(见电容率与损耗因数试验)
dielectric loss tangent test

)!eZh.sunhooJ一002匕engq一e sh一yon介质损耗角正切试验(dieleetri。1055 tangenttest)见电容率与损耗因数试验。
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