1) semi-par-allel decoder
半并行译码器
2) block parallel decoder
分块并行译码器
4) quasi-parallel decoder
准并行译码器
6) parallel decoding
并行译码
1.
For the purpose of cutting down the delay of the decoding calculation, this paper presents an algorithm of sub-block parallel decoding on the basis of the theory of the handover and iteration.
为了减少译码计算的时延,利用递推迭代的思想,给出一种分块并行译码的方法,即将接收的整个码字分成若干子块,各子块进行并行处理,其中各子块的前后向递推公式的初始值由相邻子块的前一次迭代译码的边界计算值传递。
2.
For high data applications,the parallel decoding scheme can reduce the decoding delay greatly.
为了适应高速率通信系统的发展要求,Turbo码采用并行译码的结构方式来降低时延。
3.
According to the error-correcting capability complementarity of Chase decoding algorithm and Ordered Statistic Decoding(OSD) algorithm,a new Chase-OSD parallel decoding algorithm for RM codes is proposed,in which,OSD algorithm processes certain MRIPs of a received sequence,while Chase-type decoding algorithm processes certain LRPs of a received sequence.
根据Chase译码算法和分阶统计译码(OSD)算法在纠错能力上的互补性,提出一种新的针对RM码的OSD-Chase并行译码算法,其中,OSD算法对接收序列的高可信相互独立符号集合(MRIPs)进行处理,并产生候选码字,若MRIPs中有超过i个错误,则order-i的OSD算法译码失败。
补充资料：电容分压器(见分压器)
电容分压器(见分压器)
capacitor voltage dividers
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说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条