1.
A FPGA Design of CRC and Convolution Encoder Based on ITU Standards
基于ITU标准的CRC加卷积编码器的FPGA设计
2.
VHDL Realization of Encoder and Decoder for Convolutional Code in Communication System
通信系统中卷积码编解码器的VHDL实现
3.
The FPGA Design and Implement of Viterbi Encoder and Decoder for Convolutional Codes
基于FPGA的卷积码Viterbi编码/译码器的设计与实现
4.
Design of Convolution Coder Described by Verilog HDL
基于Verilog HDL语言描述的卷积码编码器的设计
5.
Research on the Hight Efficient Encoding/Decoding Technique for LDPC Codes and Serially Concatenated LDPC/Convolutional Codes;
高效LDPC码及级联LDPC/卷积码编译码的性能研究
6.
compass integrated system compiler
积分罗经系统编码器
7.
Research and Implementation of Convolutional Coding Algorithm in TD-SCDMA
TD-SCDMA系统卷积编码算法研究与实现
8.
Implement of a CRC and Convolution Encoding System Based on VHDL
基于VHDL语言的CRC加卷积编码系统
9.
Decoder Design for Convolutional Code Based on Viterbi Method
基于维特比算法的卷积码译码器设计
10.
Convolution code is a better code of error controlling performance.
卷积码是一种性能优良的差错控制编码。
11.
Research and Implementation of Convolutional Coding and Viterbi Decoding Based on FPGA;
基于FPGA的卷积编码和维特比译码的研究与实现
12.
Research on CPC coded cooperation based on incremental selection protocols
基于补充打孔卷积码的编码协同方案研究
13.
Design and Implementation of RS Decoder and Convolution Code Synchronizer in DVB-S;
DVB-S中RS译码器与卷积码同步器的设计与实现
14.
Viterbi algorithm is the most likelihood decode algorithm of convolution code.
维特比译码算法是卷积编码的最大似然译码算法。
15.
Asynchronous Distributed Linear Convolutional Space-Time Code under Multipath Channels
多径信道下的异步分布式线性卷积空时编码
16.
Convolution Code of the Viterbi Decoding FPGA to Achieve
卷积码Viterbi译码的FPGA实现
17.
The Research on Spreading Spectrum Code Fast Synchronization Using SAW Convolvers;
基于SAW卷积器的扩频码快速同步的研究
18.
Concatenated Reed-Solomon Product Code/Convolutional Code with Iterative Decoding
迭代译码的级联Reed-Solomon乘积码与卷积码