1.
Design of digital trigger based on FPGA
基于FPGA的全数字触发器的设计
2.
Digital Trigger Design for Rectification and Regulated Power Supply of Digital Generator
数码发电机的整流稳压电源数字触发器设计
3.
Design of digital trigger for hydrogen manufacture by electrolysis based on single-chip computer;
基于单片机的制氢电源数字触发器设计
4.
In this paper,application of 803l single chip microcomputer in thyristor triggering circuit isdetailed:Digital flip-flop of high resolution.
详细介绍了8031单片机在晶闸管触发电路中的应用:高分辨率的数字触发器。
5.
The control of a specific flip-flop which stores the algebraic sign of numbers.
对存储数字的代数符号的特殊触发器的控制。
6.
Design of programable trigger function of oscilloscope based on LabVIEW
基于LabVIEW的数字示波器上可编程触发功能的实现
7.
Digital phase discrimination method with accumulated dual-direction-differential trigger based on CPLD
基于CPLD的累次双向差动触发器型数字鉴相方法
8.
Implementation of Trigger Circuit in Digital Storage Oscilloscope by FPGA
数字存储示波器中触发电路的FPGA设计与实现
9.
The Design of the Commutating Logic Circuit Without Circumfluence and the Digital Pulse Flip-flop;
交—交变频无环流换相逻辑及数字脉冲触发器的设计
10.
graphic alphanumeric generator
图形字母数字发生器
11.
The Eliminator Supply Design based on Touch Screen and PLC Digital Trigger Mode
基于触摸屏和PLC的数字触发式整流电源设计
12.
Parsing property indicating the value(s) in a trigger field which qualify the instance data for parsing into this schema bucket.
指示触发器字段中的值的分析属性，该字段将用于分析的实例数据限定到此架构桶中。
13.
Node "{0}" - The field selected as Trigger Field must have single value set in the Data Type Values property.
节点“{0}”- 选择作为触发器字段的字段必须在数据类型值属性中设置单一值。
14.
clocked flip flop
时标触发器定时触发器
15.
Implementation of Flip-flop Circuit within Digital Logic Analyzer Based on FPGA;
数字逻辑分析仪中触发电路的FPGA实现
16.
Design of arbitray counters consisting of T-type flip-flops;
由T触发器构成的计数器自启动设计
17.
The rule firing count performance counter could not be updated.
无法更新规则触发计数性能计数器。
18.
Trigger and Time Inter-plug Circuit is an important module in the random sample Digital Storage Oscillope (DSO).
触发与时间内插电路模块是随机取样数字存储示波器中的重要电路模块。