1.
Digit-serial binary field multiplier based on Mastrovito multiplication
基于Mastrovito乘法的字串行特征二域乘法器
2.
quarter-square multiplier
四分之一平方乘法器
3.
analog multiplier hybrids
模拟乘法器混合微电路
4.
Architecture and Implementation of Multiplier Suitable for ECC Based on Divided Algorithm
基于分治算法的ECC乘法器结构及实现
5.
Multi-radix Booth Algorithm of Multi-bit Multiplier
多位乘法器的多阶Booth算法的实现
6.
One Large Multiplication's Fast Implementation
一种快速大数乘法器的设计方法——大数乘法的高速实现
7.
The described multiplier is basedon the variable transconductance principle.
本文叙述一种可变跨导脉冲乘法器。
8.
Multiplier is the key in the Digital Signal Processing System.
乘法器是数字信号处理系统中的关键。
9.
A Multicell-Type Logic (DYL) 12 bit×12 bit Super High Speed Multiplier
多元逻辑12位×12位超高速乘法器
10.
18×18 Parallel and Pipeline Multiplier Chip Design
18×18并行流水乘法器芯片设计
11.
The Study of a Power Factor Correction Chip without Multiplier;
一种无乘法器的CMOS PFC控制电路
12.
24 Fixed-point DSP Parallel Multiplier Design;
基于24位定点DSP的并行乘法器的设计
13.
Research on 32 Bit High-Speed Floating-Point Multiplier Design;
32位高速浮点乘法器设计技术研究
14.
32×32 High-speed Multiplier Design and Implementation
32×32高速乘法器的设计与实现
15.
Design CSD Serial-Parallel Multiplier for Constant Coefficients FIR Filter
常系数FIR中的CSD串并乘法器设计
16.
Implementation of 20×18 bit Sign Fix Point Multiplier Based on FPGA
20×18位符号定点乘法器的FPGA实现
17.
Design and Implementation of Parallel Multiplier Based on Optimal Normal Basis of Type Ⅱ
基于Ⅱ型ONB并行乘法器的设计与实现
18.
The Design of High Speed Pipeline Floating Point Multiplier Based on FPGA
基于FPGA的高速流水线浮点乘法器设计