1) fully depleted
全耗尽
1.
Research of SOI CMOS Integrated Circuit Based on Fully Depleted Technology;
基于全耗尽技术的SOI CMOS集成电路研究
2.
The Research of Deep Submicron Fully Depleted SOI MOSFET Parameter Extraction Method;
深亚微米全耗尽SOI MOSFET参数提取方法的研究
3.
With the reduction of critical dimension,the device that have higher driving ability and good short channel effect is one of the focuses and multiple-gate fully depleted SOI MOSFET can resolve this problem effectively due to better control ability in the channel.
随着器件尺寸的不断缩小,对更大驱动电流和更有效抑制短沟道效应器件的研制成为研究的热点,SOI多栅全耗尽器件由于对沟道更好控制能力能够有效地解决尺寸缩小带来的短沟道效应问题[1]。
2) fully-depleted
全耗尽
1.
The total dose irradiation effects under different bias configurations for fully-depleted (FD) silicon on insulator (SOI) devices are investigated,especially the influence on device performance from radiation-induced trapped-charges.
研究了不同偏置条件下,全耗尽SOI NMOSFET的总剂量抗辐射特性,主要讨论不同偏置条件对器件中陷获电荷的产生和分布,以及由此对器件性能产生的影响。
2.
Dual poly gate fully-depleted SOI CMOS devices and circuits were investigated.
对多晶硅双栅全耗尽SO I CM O S工艺进行了研究,开发出了1。
3.
Using SIMOX substrate, fully-depleted thin-film SOI.
选用SIMOX(Separation by Implantation of Oxygen)衬底材料,对全耗尽SOI CMOS工艺进行了研究,并发出了N+多晶硅栅全耗尽SOI CMOS器件及电路工艺,获得了性能良好的器件和电路。
4) fully depleted SOI MOSFET
全耗尽SOIMOSFET
1.
Analytical threshold voltage model for fully depleted SOI MOSFETs;
全耗尽SOIMOSFET阈值电压解析模型
5) Fully depleted device
全耗尽器件
6) fully depleted SOI-MOSFET
全耗尽SOI-MOSFET
1.
A novel approximation of the two-dimensional(2D)potential function perpendicular to the channel is proposed,and then an analytical threshold voltage model for a fully depleted SOI-MOSFET with a non-uniform Gaussian distribution doping profile is given based on this approximation.
对垂直于沟道的二维电势分布函数提出了一种新的近似,给出了基于这种近似的杂质浓度呈高斯分布的非均匀掺杂全耗尽SOI-MOSFET的阈值电压解析模型。
补充资料：耗尽
1.消减净尽。 2.用完。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条